Over the past several years there has been a sustained effort by manufactures of integrated circuits to develop a new generation of integrated circuit electronics having very large scales of integration, higher device density, lower power consumption, and faster clock times. The development of this new generation of ICs has been made possible by continued advancements in microelectronic miniaturization. One important aspect of the new advanced microelectronics is that copper has now replaced aluminum as the material from which interconnects are made. (The interconnects are the wire connections that communicate electrical signals to the millions of logical devices arrayed upon an integrated circuit.)
Copper has replaced aluminum for several reasons. It is a better conductor than aluminum, and also has a higher electromigration resistance. (In fact, electromigration resistance is roughly proportional to the melting point of a material, and copper's melting point is almost twice that of aluminum.) Moreover, and perhaps most importantly, by using copper the interconnection lines can be made thinner (even below 0.5 μm) than with aluminum, which is a critical design aspect for increasing integration and device density. Overall replacing aluminum with copper as the interconnection material results in an integrated circuit that has increased chip speed, is more reliable, consumes less power and can actually be less expensive to manufacture.
Of course preparing ICs with copper interconnects also presents certain challenges. In particular, greater care to surface preparation is necessary. Copper interconnects are formed by depositing copper into an interconnection pattern formed in a silicon oxide film that is deposited on a silicon wafer. Often, a barrier metal film (typically formed from Ta) is sputtered over the interconnection pattern before the copper in order to provide a barrier to prevent the diffusion of copper into the insulating silicon oxide film. After the completion of these steps excess copper is left remaining on the surface of the insulating oxide film and over the copper formed in the interconnection pattern. Great care must be taken in removing the excess copper without imparting surface defects while at the same time achieving very close planarization over the wafer surface.
One technique that has been used for preparing the wafer surface by removing the excess copper and planarizing is chemical-mechanical polishing (“CMP”). In CMP a chemically active slurry, which contains sub-micron sized abrasive particles, is utilized to polish and planarize the wafer. CMP involves two concurrent processes: mechanical abrasion of the surface followed by chemical dissolution of the abraded material into the slurry.
Currently, many of these CMP slurries include colloidal silica as the abrasive particles to provide mechanical abrasion. However, while spherical colloidal silica particles are gentle to the wafer surface, and impart the fewest surface defects, they also have the slowest copper removal rate, and provide the smallest amount of effective planarization. In place of colloidal silica, fumed silica can be used instead. But it has been found that fumed silica performs in an essentially complementary fashion to colloidal silica: it has a high removal rate and provides excellent overall planarization, but its particles also can inflict heavy surface damage, and leave innumerable surface defects after polishing.
Besides silica materials other abrasives have been proposed for use in CMP slurries, such as mixed oxides, ceria and alumina. While these materials have met with some success, they typically pose similar problems as the aforementioned colloidal and fumed silicas. For example when ceria is incorporated into CMP slurries, the ceria tends to form agglomerates, which are particularly harsh on wafer surfaces and cause extensive surface damage.
Given the foregoing there is a continuing need to develop CMP slurries that provide sufficient mechanical abrasion so that excess copper is removed at an acceptable rate but without being so excessively abrasive as to inflict severe damage or impart surface defects.
Abrasive-free slurries have been developed that attempt to provide excellent removal rate performance without inflicting severe surface damage. Such slurries may, for example, be formulated as highly alkaline aqueous solutions. Such slurries attempt to perform the most significant fraction of their cleaning by chemical means. These slurry compositions can often provide excellent removal rate performance and because they lack an abrasive they do not scratch wafer surfaces or impart surface defects to the material. However, unfortunately, they have been shown to damage the wafer surface in yet other ways. Most notably, because of the harshness of the formulations that are used, significant erosion and corrosion on wafer surfaces can occur.
Given the foregoing there is a continuing need for a slurry for use in chemical mechanical polishing that effectively removes excess layers from wafers and provides effective surface planarization. This slurry should provide these benefits without imparting surface defects or causing erosion or corrosion of the interconnects on the wafer surface. Additionally, the CMP slurry should provide substantially improved metal selection performance.